LeFlow: Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks

Daniel H. Noronha, Bahar Salehpour, Steven J. E. Wilton
7/14/2018
cs.LGstat.ML

Official code: danielholanda/LeFlow (629 stars, last commit 2020-01-03).

Abstract

Recent work has shown that Field-Programmable Gate Arrays (FPGAs) play an important role in the acceleration of Machine Learning applications. Initial specification of machine learning applications are often done using a high-level Python-oriented framework such as Tensorflow, followed by a manual translation to either C or RTL for synthesis using vendor tools. This manual translation step is time-consuming and requires expertise that limit the applicability of FPGAs in this important domain. In this paper, we present an open-source tool-flow that maps numerical computation models written in Tensorflow to synthesizable hardware. Unlike other tools, which are often constrained by a small number of inflexible templates, our flow uses Google's XLA compiler which emits LLVM code directly from a Tensorflow specification. This LLVM code can then be used with a high-level synthesis tool to automatically generate hardware. We show that our flow allows users to generate Deep Neural Networks with very few lines of Python code.

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danielholanda/LeFlowOfficial100%

Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks

629101V, C++Jun 11, 20186 years agoNOASSERTION

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Cite this paper

@article{noronha2018leflow,
  title  = {LeFlow: Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks},
  author = {Daniel H. Noronha and Bahar Salehpour and Steven J. E. Wilton},
  year   = {2018},
  eprint = {1807.05317},
  archivePrefix = {arXiv},
  url    = {https://arxiv.org/abs/1807.05317}
}

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