Learning Robust and Correct Controllers from Signal Temporal Logic Specifications Using BarrierNet

Wenliang Liu, Wei Xiao, Calin Belta
4/12/2023
eess.SYcs.LG

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Abstract

In this paper, we consider the problem of learning a neural network controller for a system required to satisfy a Signal Temporal Logic (STL) specification. We exploit STL quantitative semantics to define a notion of robust satisfaction. Guaranteeing the correctness of a neural network controller, i.e., ensuring the satisfaction of the specification by the controlled system, is a difficult problem that received a lot of attention recently. We provide a general procedure to construct a set of trainable High Order Control Barrier Functions (HOCBFs) enforcing the satisfaction of formulas in a fragment of STL. We use the BarrierNet, implemented by a differentiable Quadratic Program (dQP) with HOCBF constraints, as the last layer of the neural network controller, to guarantee the satisfaction of the STL formulas. We train the HOCBFs together with other neural network parameters to further improve the robustness of the controller. Simulation results demonstrate that our approach ensures satisfaction and outperforms existing algorithms.

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@article{liu2023learning,
  title  = {Learning Robust and Correct Controllers from Signal Temporal Logic Specifications Using BarrierNet},
  author = {Wenliang Liu and Wei Xiao and Calin Belta},
  year   = {2023},
  eprint = {2304.06160},
  archivePrefix = {arXiv},
  url    = {http://arxiv.org/abs/2304.06160v1}
}

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