Hierarchical Source-to-Post-Route QoR Prediction in High-Level Synthesis with GNNs

Mingzhe Gao, Jieru Zhao, Zhe Lin, Minyi Guo
1/14/2024
cs.ARcs.AIcs.LG

No official code found. Best implementation: sjtu-zhao-lab/hierarchical-gnn-for-hls (21 stars, Apache-2.0, last commit 2024-12-10).

Abstract

High-level synthesis (HLS) notably speeds up the hardware design process by avoiding RTL programming. However, the turnaround time of HLS increases significantly when post-route quality of results (QoR) are considered during optimization. To tackle this issue, we propose a hierarchical post-route QoR prediction approach for FPGA HLS, which features: (1) a modeling flow that directly estimates latency and post-route resource usage from C/C++ programs; (2) a graph construction method that effectively represents the control and data flow graph of source code and effects of HLS pragmas; and (3) a hierarchical GNN training and prediction method capable of capturing the impact of loop hierarchies. Experimental results show that our method presents a prediction error of less than 10% for different types of QoR metrics, which gains tremendous improvement compared with the state-of-the-art GNN methods. By adopting our proposed methodology, the runtime for design space exploration in HLS is shortened to tens of minutes and the achieved ADRS is reduced to 6.91% on average.

View on arXivView PDF

Code Implementations(1)

sjtu-zhao-lab/hierarchical-gnn-for-hlsCommunity100%
Apache-2.0

DATE'24 paper: "Hierarchical Source-to-Post-Route QoR Prediction in High-Level Synthesis with GNNs"

210C, C++Jan 14, 20241 years agoApache-2.0

Similar Papers

HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond

79% match1 repo582024

Intelligent4DSE: Optimizing High-Level Synthesis Design Space Exploration with Graph Neural Networks and Large Language Models

79% match2025

LIFT: LLM-Based Pragma Insertion for HLS via GNN Supervised Fine-Tuning

78% match2025

The Graph's Apprentice: Teaching an LLM Low Level Knowledge for Circuit Quality Estimation

78% match2024

MPM-LLM4DSE: Reaching the Pareto Frontier in HLS with Multimodal Learning and LLM-Driven Exploration

77% match1 repo22026

HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level Synthesis

77% match1 repo452023

Cite this paper

@article{gao2024hierarchical,
  title  = {Hierarchical Source-to-Post-Route QoR Prediction in High-Level Synthesis with GNNs},
  author = {Mingzhe Gao and Jieru Zhao and Zhe Lin and Minyi Guo},
  year   = {2024},
  eprint = {2401.08696},
  archivePrefix = {arXiv},
  url    = {http://arxiv.org/abs/2401.08696v1}
}

Add a badge to your README

Shows whether official code is linked for this paper.

Code of Paper badge
[![Code of Paper](https://codeofpaper.com/badge/2401.08696.svg)](https://codeofpaper.com/paper/2401.08696)

Discussion