A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection

Yifan Qin, Zhenge Jia, Zheyu Yan, Jay Mok, Manto Yung +7 more
10/22/2024
cs.ARcs.AI

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Abstract

This paper proposes an ultra-low power, mixed-bit-width sparse convolutional neural network (CNN) accelerator to accelerate ventricular arrhythmia (VA) detection. The chip achieves 50% sparsity in a quantized 1D CNN using a sparse processing element (SPE) architecture. Measurement on the prototype chip TSMC 40nm CMOS low-power (LP) process for the VA classification task demonstrates that it consumes 10.60 $μ$W of power while achieving a performance of 150 GOPS and a diagnostic accuracy of 99.95%. The computation power density is only 0.57 $μ$W/mm$^2$, which is 14.23X smaller than state-of-the-art works, making it highly suitable for implantable and wearable medical devices.

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@article{qin2024,
  title  = {A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection},
  author = {Yifan Qin and Zhenge Jia and Zheyu Yan and Jay Mok and Manto Yung and Yu Liu and Xuejiao Liu and Wujie Wen and Luhong Liang and Kwang-Ting Tim Cheng and X. Sharon Hu and Yiyu Shi},
  year   = {2024},
  eprint = {2410.17395},
  archivePrefix = {arXiv},
  url    = {http://arxiv.org/abs/2410.17395v1}
}

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