Hard Math -- Easy UVM: Pragmatic solutions for verifying hardware algorithms using UVM

Mark Litterick, Aleksandar Ivankovic, Bojan Arsov, Aman Kumar
12/6/2024
cs.AIcs.ARcs.LO

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Abstract

This paper presents pragmatic solutions for verifying complex mathematical algorithms implemented in hardware in an efficient and effective manner. Maximizing leverage of a known-answer-test strategy, based on predefined data scenarios combined with design-for-verification modes, we demonstrate how to find and isolate concept and design bugs early in the flow. The solutions presented are based on real project experience with single chip radar sensors for a variety of applications. The verification environments supporting the presented strategies are based on SystemVerilog and the Universal Verification Methodology.

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Cite this paper

@article{litterick2024hard,
  title  = {Hard Math -- Easy UVM: Pragmatic solutions for verifying hardware algorithms using UVM},
  author = {Mark Litterick and Aleksandar Ivankovic and Bojan Arsov and Aman Kumar},
  year   = {2024},
  eprint = {2412.04919},
  archivePrefix = {arXiv},
  url    = {http://arxiv.org/abs/2412.04919v1}
}

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