FPGA-based Acceleration of Neural Network for Image Classification using Vitis AI

Zhengdong Li, Frederick Ziyang Hong, C. Patrick Yue
12/30/2024
cs.CVeess.IV

No confident code implementation found for this paper. 2 possible matches can be shown below.

Abstract

In recent years, Convolutional Neural Networks (CNNs) have been widely adopted in computer vision. Complex CNN architecture running on CPU or GPU has either insufficient throughput or prohibitive power consumption. Hence, there is a need to have dedicated hardware to accelerate the computation workload to solve these limitations. In this paper, we accelerate a CNN for image classification with the CIFAR-10 dataset using Vitis-AI on Xilinx Zynq UltraScale+ MPSoC ZCU104 FPGA evaluation board. The work achieves 3.33-5.82x higher throughput and 3.39-6.30x higher energy efficiency than CPU and GPU baselines. It shows the potential to extract 2D features for downstream tasks, such as depth estimation and 3D reconstruction.

View on arXivView PDF

Code Implementations

No confident code match yet

We couldn't find an author-owned or strongly-evidenced community implementation for this paper. 2 weaker matches are hidden by default — verify before relying on them.

No code implementations found yet.

Know of an implementation? Let us know in the comments below!

Similar Papers

Cite this paper

@article{li2024fpgabased,
  title  = {FPGA-based Acceleration of Neural Network for Image Classification using Vitis AI},
  author = {Zhengdong Li and Frederick Ziyang Hong and C. Patrick Yue},
  year   = {2024},
  eprint = {2412.20974},
  archivePrefix = {arXiv},
  url    = {http://arxiv.org/abs/2412.20974v1}
}

Add a badge to your README

Shows whether official code is linked for this paper.

Code of Paper badge
[![Code of Paper](https://codeofpaper.com/badge/2412.20974.svg)](https://codeofpaper.com/paper/2412.20974)

Discussion