Atleus: Accelerating Transformers on the Edge Enabled by 3D Heterogeneous Manycore Architectures

Pratyush Dhingra, Janardhan Rao Doppa, Partha Pratim Pande
1/16/2025
cs.ARcs.LG

No confident code implementation found for this paper.

Abstract

Transformer architectures have become the standard neural network model for various machine learning applications including natural language processing and computer vision. However, the compute and memory requirements introduced by transformer models make them challenging to adopt for edge applications. Furthermore, fine-tuning pre-trained transformers (e.g., foundation models) is a common task to enhance the model's predictive performance on specific tasks/applications. Existing transformer accelerators are oblivious to complexities introduced by fine-tuning. In this paper, we propose the design of a three-dimensional (3D) heterogeneous architecture referred to as Atleus that incorporates heterogeneous computing resources specifically optimized to accelerate transformer models for the dual purposes of fine-tuning and inference. Specifically, Atleus utilizes non-volatile memory and systolic array for accelerating transformer computational kernels using an integrated 3D platform. Moreover, we design a suitable NoC to achieve high performance and energy efficiency. Finally, Atleus adopts an effective quantization scheme to support model compression. Experimental results demonstrate that Atleus outperforms existing state-of-the-art by up to 56x and 64.5x in terms of performance and energy efficiency respectively

View on arXivView PDF

Code Implementations

No confident code match yet

We couldn't find an author-owned or strongly-evidenced community implementation for this paper. Any repos shown below are weak matches — verify before relying on them.

No code implementations found yet.

Know of an implementation? Let us know in the comments below!

Similar Papers

Cite this paper

@article{dhingra2025atleus,
  title  = {Atleus: Accelerating Transformers on the Edge Enabled by 3D Heterogeneous Manycore Architectures},
  author = {Pratyush Dhingra and Janardhan Rao Doppa and Partha Pratim Pande},
  year   = {2025},
  eprint = {2501.09588},
  archivePrefix = {arXiv},
  url    = {http://arxiv.org/abs/2501.09588v1}
}

Add a badge to your README

Shows whether official code is linked for this paper.

Code of Paper badge
[![Code of Paper](https://codeofpaper.com/badge/2501.09588.svg)](https://codeofpaper.com/paper/2501.09588)

Discussion