HPU: High-Bandwidth Processing Unit for Scalable, Cost-effective LLM Inference via GPU Co-processing

Myunghyun Rhee, Joonseop Sim, Taeyoung Ahn, Seungyong Lee, Daegun Yoon +4 more
4/18/2025
cs.ARcs.AIcs.CL

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Abstract

The attention layer, a core component of Transformer-based LLMs, brings out inefficiencies in current GPU systems due to its low operational intensity and the substantial memory requirements of KV caches. We propose a High-bandwidth Processing Unit (HPU), a memoryintensive co-processor that enhances GPU resource utilization during large-batched LLM inference. By offloading memory-bound operations, the HPU allows the GPU to focus on compute-intensive tasks, increasing overall efficiency. Also, the HPU, as an add-on card, scales out to accommodate surging memory demands driven by large batch sizes and extended sequence lengths. In this paper, we show the HPU prototype implemented with PCIe-based FPGA cards mounted on a GPU system. Our novel GPU-HPU heterogeneous system demonstrates up to 4.1x performance gains and 4.6x energy efficiency improvements over a GPUonly system, providing scalability without increasing the number of GPUs.

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Cite this paper

@article{rhee2025hpu,
  title  = {HPU: High-Bandwidth Processing Unit for Scalable, Cost-effective LLM Inference via GPU Co-processing},
  author = {Myunghyun Rhee and Joonseop Sim and Taeyoung Ahn and Seungyong Lee and Daegun Yoon and Euiseok Kim and Kyoung Park and Youngpyo Joo and Hoshik Kim},
  year   = {2025},
  eprint = {2504.16112},
  archivePrefix = {arXiv},
  url    = {http://arxiv.org/abs/2504.16112v2}
}

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