Voltage Mode Winner-Take-All Circuit for Neuromorphic Systems

Abdullah M. Zyarah, Dhireesha Kudithipudi
7/6/2025
cs.AI

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Abstract

Recent advances in neuromorphic computing demonstrate on-device learning capabilities with low power consumption. One of the key learning units in these systems is the winner-take-all circuit. In this research, we propose a winner-take-all circuit that can be configured to achieve k-winner and hysteresis properties, simulated in IBM 65 nm node. The circuit dissipated 34.9 $μ$W of power with a latency of 10.4 ns, while processing 1000 inputs. The utility of the circuit is demonstrated for spatial filtering and classification.

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Cite this paper

@article{zyarah2025voltage,
  title  = {Voltage Mode Winner-Take-All Circuit for Neuromorphic Systems},
  author = {Abdullah M. Zyarah and Dhireesha Kudithipudi},
  year   = {2025},
  eprint = {2507.04338},
  archivePrefix = {arXiv},
  url    = {http://arxiv.org/abs/2507.04338v1}
}

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