cktFormer: Transformer-Based Approach for Automated Analog Circuit Design

Pasindu Dodampegama, Praveen Wijesinghe, Naveen Basnayake, Keshawa Jayasundara, Tharindu Bandaragoda
9/29/2026
cs.LGcs.AR

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Abstract

Circuit design is a complex and iterative process that requires expertise in electronic engineering. It involves selecting components while meeting performance constraints, such as power efficiency, cost-effectiveness, and signal integrity. However, manual design is time-consuming and prone to errors. Although other stages of the manufacturing pipeline have benefited from AI-driven optimizations, circuit design remains a bottleneck, limiting overall productivity. Generative AI and machine learning offer the potential to automate and improve this stage, boosting efficiency and accuracy. To address this, we introduce a dual transformer architecture that bridges the gap between AI and circuit design by leveraging attention mechanisms to model complex, non-sequential circuit relationships. Our approach structures netlist data into graph-based representations, enabling effective learning of circuit topology and component interactions. The system consists of two interlinked models: a node prediction model that proposes components and an edge prediction model that infers valid connections. This collaborative and decoupled design captures both component-level semantics and global structural coherence. In our experiments, this architecture outperforms recent models such as AnalogGenie and cktGNN in the validity of generated circuits. By addressing key limitations in existing methods, our work advances automation in electronics engineering and contributes a benchmark for AI-driven circuit synthesis.

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@article{dodampegama2026cktformer,
  title  = {cktFormer: Transformer-Based Approach for Automated Analog Circuit Design},
  author = {Pasindu Dodampegama and Praveen Wijesinghe and Naveen Basnayake and Keshawa Jayasundara and Tharindu Bandaragoda},
  year   = {2026},
  eprint = {2609.36752},
  archivePrefix = {arXiv},
  url    = {http://arxiv.org/abs/2609.36752v1}
}

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